Disclaimer: This page refers to former member of the group. Validity or accuracy of the following information is thus not guaranteed in any way.
| Address: | Microelectronics Laboratory, Place du Levant, 3 |
| Office: | b.127a |
| Voice: | +32 10 47 91 64 |
| Fax: | +32 10 47 25 98 |
| E-Mail: | |
| Homepage: | http://www.dice.ucl.ac.be/~peeters |
Publications
François-Xavier Standaert, Eric Peeters, Cédric Archambeau, and Jean-Jacques Quisquater. Towards Security Limits of Side-Channel Attacks, In Louis Goubin and Mitsuru Matsui, editor(s), Cryptographic Hardware and Embedded Systems - Proceedings of CHES 2006, Volume 4249 of LNCS, pages 30-45, Springer, October 2006 BibTeX
Cédric Archambeau, Eric Peeters, François-Xavier Standaert, and Jean-Jacques Quisquater. Template Attacks in Principal Subspaces, In Louis Goubin and Mitsuru Matsui, editor(s), Cryptographic Hardware and Embedded Systems - Proceedings of CHES 2006, Volume 4249 of LNCS, pages 1--14, Springer, October 2006 BibTeX
Eric Peeters, François-Xavier Standaert, and Jean-Jacques Quisquater. Power and Electromagnetic Analysis: Improved Model, Consequences and Comparisons, In Special Issue of Integration, The VLSI Journal: Embedded Cryptographic Hardware, September 2006, To Appear PDF BibTeX
Michael Neve, Eric Peeters, Guerric Meurice de Dormale, and Jean-Jacques Quisquater. Faster and smaller hardware implementation of XTR, In Franklin T. Luk, editor(s), Advanced Signal Processing Algorithms, Architectures, and Implementations XVI, Volume 6313 of Proceedings of SPIE, August 2006 BibTeX
François-Xavier Standaert, François Mace, Eric Peeters, and Jean-Jacques Quisquater. Updates on the Security of FPGAs Against Power Analysis Attacks, ARC, Volume 3985, pages 335-346, March 2006 BibTeX
François-Xavier Standaert, Eric Peeters, Gaël Rouvroy, and Jean-Jacques Quisquater. An Overview of Power Analysis Attacks Against Field Programmable Gate Arrays, In Proceedings of the IEEE, Volume 94-2, February 2006 BibTeX
Eric Peeters, François-Xavier Standaert, Nicolas Donckers, and Jean-Jacques Quisquater. Improved Higher Order Side-Channel Attacks with FPGA experiments, In Josyula R. Rao, Berk Sunar, editor(s), Cryptographic Hardware and Embedded Systems - Proceedings of CHES 2005, Volume 3659 of Lecture Notes in Computer Science, pages 309-323, Spinger-Verlag, August 2005 BibTeX
François-Xavier Standaert, Eric Peeters, and Jean-Jacques Quisquater. On the Masking Countermeasure and Higher-Order Power Analysis Attacks, ITCC 2005, Volume 1, pages 562-567, IEEE Computer Society, April 2005 BibTeX
Mathieu Ciet, Michael Neve, Eric Peeters, and Jean-Jacques Quisquater. Parallel FPGA Implementation of RSA with Residue Number Systems - Can side-channel threats be avoided? - Extended Version, July 2004 PDF BibTeX
Jean-Jacques Quisquater, Michael Neve, Eric Peeters, and François-Xavier Standaert. L'émission rayonnée des cartes à puces : une vue d'ensemble, In Revue de l'Electricité et de l'Electronique-6/7, June 2004 BibTeX
Eric Peeters, Michael Neve, and Mathieu Ciet. XTR implementation on reconfigurable hardware, Cryptographic Hardware and Embedded Systems - CHES 2004, Lecture Notes in Computer Science, Springer-Verlag © IACR, January 2004 PDF BibTeX
Mathieu Ciet, Michael Neve, Eric Peeters, and Jean-Jacques Quisquater. Parallel FPGA implementation of RSA with residue number systems -- Can side-channel threats be avoided? --, IEEE Midwest International Symposium on Circuits and Systems 2003 (Special session on Security and Cryptographic Hardware Implementations), January 2003 PDF BibTeX
Michael Neve, Eric Peeters, David Samyde, and Jean-Jacques Quisquater. Memories: A Survey of their Secure Uses in Smart Cards, Second International IEEE Security in Storage Workshop - Proceedings of SISW 2003, January 2003 PDF BibTeX