Public Thesis Defense of Marco GONZALEZ - ICTEAM
sst |
Highly Programmable Low-Power RF Front Ends for Adaptive Long-Range Internet-of-Things Receivers
Monday January 5th, 2026 - 4pm - Auditorium SUD03 - Place Croix du Sud - 1348 Louvain-la-Neuve
Despite outstanding advances in energy efficiency in Internet-of-Things (IoT) devices, wireless communication remains one of the most significant contributors to their overall power consumption. The contribution from radio-frequency (RF) receivers comes from the fact that the input signal has a small amplitude, comparable to that of the noise, which makes its demodulation difficult. Its low input power is due to the high channel attenuation linked to communicating over the air, especially over long distances. The stochastic variability of this channel attenuation is an aggravating factor. To overcome this, transceivers for long-range IoT communications are conventionally designed to operate correctly under certain worst-case conditions. However, these worst-case conditions are rarely encountered in practice. Operating under this hypothesis causes a non-negligible power overhead on RF receivers because the circuits' performance in terms of noise, linearity, and interference immunity is at its best continuously. Reducing the power consumption of IoT devices is especially important for battery-powered or energy-harvesting ones, as it is key to maximizing their lifetime.
In this thesis, we explore a different design approach in which the receiver adapts its performance to the state of the wireless channel. The goal is to minimize its power consumption while maintaining an acceptable quality of service. Within low-power wide-area networks, LoRaWAN already features such adaptation capacity in its physical layer, LoRa, through the spreading factor (SF). Given that the SF choice is discrete and limited, we aim in this thesis to extend this adaptation to the circuit level. With programmable circuits in the RF front end of the receiver that can dynamically trade off noise for power, we can have further power savings for any SF. The design of such circuits is the main focus of this thesis, and we tackle it in three parts: (i) how to design programmable analog circuits, (ii) two prototypes showcasing the potential power savings, and (iii) a specific use case where the noise-power trade-off is pushed to its limit to enable an ultra-low-power receiver mode
Jury members :
Prof. David BOL (UCLouvain) (Promoteur)
Prof. Christophe CRAEYE (UCLouvain) (Président)
Prof. Denis FLANDRE (UCLouvain) (Secrétaire)
Dr. Jan CRANINCKX (imec, Belgium)
Prof. Georges GIELEN (KULeuven, Belgium)
Dr. Dominique MORCHE (CEA, France)